What Happened to FPGA Prices?
Between 2020 and 2022, the semiconductor industry experienced what analysts called “chipflation” — a sustained, broad-based price increase driven by pandemic-related demand spikes, supply chain disruptions, and surging investment in AI and 5G infrastructure.
FPGA manufacturers were not immune. AMD (Xilinx) and Intel (Altera) both cited rising TSMC wafer costs as justification for significant list-price increases — in some cases close to double the pre-pandemic price. Unlike commodity memory or microcontroller price spikes that eventually normalised, elevated FPGA prices have proven sticky.
A concrete example: the ZCU216 Zynq UltraScale+ RFSoC evaluation kit is currently listed at $16,995 USD (approximately ₩23,000,000 KRW). Even mid-range development kits that once cost a few hundred dollars now routinely exceed $1,000–2,000.
Beyond unit pricing, lead times stretched from the typical few weeks to 26–52 weeks or more in peak shortage periods — and they have not fully recovered.
The Impact on Product Design
Historically, FPGAs were considered the “best of both worlds” for product design: faster time-to-market than a custom ASIC, more flexibility than a fixed-function DSP or MCU. The economics looked straightforward — pay a premium per unit for the flexibility, skip the NRE (non-recurring engineering) cost of ASIC tape-out.
That trade-off has shifted.
BOM cost pressure: A typical product BOM might contain hundreds of components. If a single FPGA costs $200–500+ in production quantities, it can dominate the total BOM cost and make the product uncompetitive at its target price point.
Inventory risk: Long lead times force procurement teams to order many months in advance. This creates excess inventory risk if the product misses its sales forecast — FPGAs are generally not returnable.
Supply predictability: Even if you are willing to pay the premium, delivery dates are uncertain. This complicates production scheduling and capacity planning.
Alternative Strategies Engineers Are Using
1. Low-Cost FPGA Vendors
Lattice Semiconductor and Efinix occupy the low-power, low-cost FPGA segment that AMD and Intel largely abandoned as they moved upmarket. Lattice’s iCE40 and ECP5 families, and Efinix’s Trion/Titanium families, offer:
- Significantly lower unit prices ($5–50 range for many parts)
- Lower power consumption
- Reasonable lead times
- Sufficient logic for many mid-complexity designs
If your design does not need the high-speed transceivers or large DSP blocks of a Virtex or Stratix, a Lattice or Efinix part may be functionally equivalent at a fraction of the cost.
2. FPGA for Prototyping, ASIC / MCU for Production
The classic “FPGA-to-ASIC” migration path has become more attractive:
- Design and validate the hardware algorithm on an FPGA (fast, flexible, debuggable).
- Once the design is frozen, tape out a custom ASIC or structured ASIC.
- Alternatively, if the throughput requirements allow, migrate to a high-performance MCU or fixed-function DSP.
The break-even volume is lower than it used to be, because FPGA unit costs have risen while ASIC NRE costs have not increased proportionally for mature process nodes (28 nm, 40 nm).
3. Hybrid Design
Rather than replacing the FPGA entirely, some teams partition the design:
- An MCU handles control-plane functions (protocol management, configuration, host interface).
- A small, cheap FPGA handles real-time data-plane functions that the MCU cannot process fast enough.
This hybrid approach can cut BOM cost significantly while retaining the flexibility benefits of programmable logic for the most timing-critical paths.
Will FPGAs Disappear from Volume Products?
FPGAs are and will remain indispensable for applications that require:
- Ultra-high parallelism (1000+ parallel operations)
- Custom protocols or non-standard interfaces
- Reconfigurability after deployment
- Rapid iteration during system development
But the era of “put a high-end FPGA in every product” appears to be over for cost-sensitive, high-volume designs. The market is bifurcating: premium FPGAs dominate defence, aerospace, high-frequency trading, and data-centre acceleration, while mid-volume industrial and consumer products are increasingly moving toward ASIC or hybrid approaches.
For FPGA engineers, this means the ability to optimise designs for low-resource-count targets and understand the ASIC migration path is becoming a core career skill.